1. Field of the Invention
The present invention generally relates to comparators of an A.C. voltage with respect to a threshold and, more specifically, to window comparators which detect the presence of an A.C. voltage within a window defined by thresholds around the zero voltage.
The present invention applies, for example, to detectors of failures of an A.C. load supply switch. The present invention also applies, for example, to detectors of zero crossings for triggering switches around the zero of an A.C. supply voltage. The present invention also applies, for example, to the detection of the state of a load as to its power supply, for example, the detection of the state of a high-intensity discharge lamp, used in particular in the automobile field.
2. Discussion of the Related Art
FIG. 1 very schematically shows an example of an assembly using an A.C. comparator 1 (AC COMP) of the type to which the present invention applies. In this example, a load 2 (L) is in series with a bi-directional switch K between two terminals 3 and 4 of application of an A.C. supply voltage Vac. Comparator 1 comprises two input terminals 11 and 12 respectively connected across switch K and compares the absolute value of voltage Vin across this switch with a threshold TH. Comparator 1 is powered by a relatively low D.C. voltage Vcc (typically from a few volts to a few tens of volts) with respect to the relatively high A.C. power supply voltage and provides a two-state detection signal OUT according to whether voltage Vin exceeds or not in absolute value threshold TH.
FIG. 2 illustrates, in a timing diagram, the operation of comparator 1 of FIG. 1. A.C. voltage Vin is assumed to be identical to voltage Vac (switch K off) and output signal OUT is in this example assumed to be activated (state 1 typically corresponding to level Vcc) when voltage Vin is within the window defined by threshold TH around level 0.
FIG. 3 shows an example of application of the present invention to the detection of the zero crossing of an A.C. supply voltage Vac applied between two terminals 3 and 4 of a circuit formed of a load 2 in series with a bidirectional A.C. switch (in this example, a triac 5). Circuit 1 provides result OUT of its detection to a circuit 6 (CTRL) for controlling triac 5. Threshold TH is set by circuit 6 and typically is an amplitude of a few volts around the voltage zero so that signal OUT is sent onto an input ZVS of circuit 6 to allow it to start the conduction periods of switch 5 around the voltage zero. Circuit 6 is, like circuit 1, supplied by a low D.C. voltage Vcc.
FIG. 4 very schematically shows in the form of blocks another example of application of the present invention to the detection of malfunctions (output FAIL of circuit 1) of a discharge lamp 2′ supplied with an A.C. voltage Vac. For simplification, the control switch of lamp 2′ has not been illustrated. The function of detector 1 is to detect the state (excited or not) of lamp 2′ by comparing the absolute value of the voltage thereacross with threshold TH.
FIG. 5 shows the electric diagram of a first conventional example of a window comparator of an A.C. voltage. A comparison of voltage Vin across a triac 5 for controlling a motor M with respect to two thresholds surrounding the average level of the A.C. voltage is assumed. The comparator of FIG. 5 is based on the use of voltage-limiting diodes D1 to D4 at the input of level matching amplifiers 21 and 22 (BUFF) having their outputs combined by a logic gate 23 (XOR) performing an XOR-type function and providing signal OUT. The input of first amplifier 21 is connected to the junction point of resistors R24 and R25 connected to terminals 11 and 12 of triac 5, as well as to the junction point of two first diodes D1 and D2 between the terminals of application of D.C. voltage Vcc. In this example, the positive terminal of application of voltage Vcc is confounded with terminal 11 and with terminal 3 while ground terminal 13 has no link with the A.C. power supply. The input of second amplifier 22 is connected to the junction point of two resistors R26 and R27 between terminal 12 and ground 13 as well as to the junction point of two second diodes D3 and D4 between terminals 11 and 13. Threshold TH around the voltage zero is set (on the positive side), by the ratio of resistors R24 and R25 and, on the negative side, by the ratio of resistors R26 and R27. For example, R24=R27 and R25=R26.
A disadvantage of the circuit of FIG. 5 is its bulk. It requires four resistors, four diodes, two level matching amplifiers as well as one logic XOR gate.
Another disadvantage is the presence of negative potentials with respect to ground (voltage of a diode junction in negative halfwaves), which complicates the integration.
FIGS. 6A, 6B, and 6C illustrate examples of timing diagrams respectively showing voltage Vac, current I injected into low-voltage source Vcc, and signal OUT, the operation of the circuit of FIG. 5. FIG. 6B illustrates an additional disadvantage of this circuit which is, in positive halfwaves of A.C. voltage Vac, its generating an inverse current in D.C. voltage Vcc. Such a current risks damaging voltage source Vcc, especially if it reaches a voltage greater than that controlled by a voltage regulator due to the injected parasitic current.
FIG. 7 shows a second conventional embodiment of comparator 1′ of an A.C. voltage Vin with respect to a threshold around the voltage zero. To simplify the representation of FIG. 7, the elements upstream of the window comparator have not been illustrated.
The circuit of FIG. 7 uses two differential comparators 31 and 32 supplied by voltage Vcc and having their respective outputs combined by an XOR-type gate 23 also powered by voltage Vcc and providing signal OUT. First inputs (respectively non-inverting and inverting) of comparators 31 and 32 are connected to the junction point of two resistors R34 and R35 between terminals 11 and 13 (ground), this junction point being also connected to terminal 12 by a resistor R39 of high value (on the order of one Megohm) having the function of holding the voltage with respect to the downstream circuit. Second inputs (inverting and non-inverting) of comparators 31 and 32 are respectively connected to the junction points of three resistors in series R36, R37, and R38 between terminals 11 and 12. This series connection aims at setting threshold TH, resistors R36 and R38 being both of same value.
FIG. 8 is a timing diagram illustrating the operation of the circuit of FIG. 7. This drawing shows an example of the shape of signal OUT with respect to the two thresholds TH1 and TH2 of comparators 1 and 2 here assumed to have the same value.
As compared with the assembly of FIG. 5, the advantage of the circuit of FIG. 7 is that by shifting the comparison with respect to level Vcc/2, it requires no negative voltage. It however maintains the risk of an inverse current in the low D.C. voltage.
Another disadvantage of the circuit of FIG. 7 is that it remains bulky since it requires six resistors, two differential comparators, and one logic gate.